Two substantially similar semiconductor components (e.g., two transistors) having substantially similar dimensions and configurations can have mismatch (e.g., a small difference in threshold voltages of the two transistors), for example, due to random manufacturing variability. Mismatch between various components in a semiconductor device can deteriorate the performance of the semiconductor device.
FIG. 1A schematically illustrates a conventional current mirror 100 comprising transistors Ta, Tb and Tc. In the current mirror 100, a source of each of the transistors Ta, Tb and Tc is coupled to a supply voltage Vpdd. The gate of the transistors Ta, Tb and Tc are coupled to each other. Furthermore, the gate of the transistor Ta is coupled to a drain of the transistor Ta. A current Ipref output by the transistor Ta is mirrored as currents Ipouta and Ipoutb, respectively, through transistors Tb and Tc. For the currents Ipouta and Ipoutb to substantially mirror the current Iref, each of the transistors Tb and Tc have to be substantially matched to the transistor Ta.
FIG. 1B schematically illustrates a top view of the transistors Ta, Tb and Tc of FIG. 1A; and FIG. 1C schematically illustrates a cross sectional view of the transistors Ta, Tb and Tc. As illustrated in FIGS. 1B and 1C, the transistor Ta has a gate region 14a, a source region 16a1 and a drain region 16a2 formed on an N-well 12a. Also illustrated in FIG. 1C is a pocket implant region 20a (e.g., comprising N-type pocket implant dopants) formed near the source and drain regions of the transistor Ta. The transistors Tb and Tc have similar components as that of the transistor Ta.
The gate regions 14a, 14b and 14c of the transistors Ta, Tb and Tc may have substantially similar dimensions (e.g., to reduce mismatch between the transistors). For example, in FIG. 1B, each of the gate regions 14a, 14b and 14c of the transistors Ta, Tb and Tc have a length L and a width W.
Mismatch between the transistors Ta, Tb and Tc may be reduced, for example, by employing a relatively large width and/or large length of each of the transistors Ta, Tb and Tc. However, it may not always be feasible to employ a relatively large width and/or large length for the transistors Ta, Tb and Tc.
In a semiconductor device (e.g., especially in a semiconductor device in which the well or the substrate gets relatively lightly doped or almost undoped), a mismatch between various components is based on, for example, fluctuations of pocket implant dosage. As an example, a standard deviation of mismatch between threshold voltages of the transistors Ta, Tb and Tc is substantially proportional to an inverse of square root of an average number of dopants in the pocket implant regions of the transistors Ta, Tb and Tc. However, as illustrated in FIG. 1C, each of the transistors Ta, Tb and Tc has relatively few pocket implants. For example, dopants in the pocket implant region 20a of transistor Ta is relatively low, compared to dimensions of the transistor Ta. Such low amount of dopants in the pocket implant regions may result in an increased mismatch between the transistors Ta, Tb and Tc, thereby deteriorating the performance of the current mirror 100.